Gaya APA

al.], M, S, [. (2014). System-Level ESD Protection Design Using On-Wafer Characterization and Transient Simulations (VOL. 14, NO. 1, MARCH 2014). New York: IEEE.

Gaya MLA

al.], Mirko, Scholz, [et. "System-Level ESD Protection Design Using On-Wafer Characterization and Transient Simulations". VOL. 14, NO. 1, MARCH 2014 New York: IEEE, 2014. e-journal.