Gaya APA

Tsai, H., Ker, M. (2014). Layout Consideration and Circuit Solution to Prevent EOS Failure Induced by Latchup Test in a High-Voltage Integrated Circuits (VOL. 14, NO. 1, MARCH 2014). New York: IEEE.

Gaya MLA

Tsai, Hui-Wen., Ker, Ming-Dou. "Layout Consideration and Circuit Solution to Prevent EOS Failure Induced by Latchup Test in a High-Voltage Integrated Circuits". VOL. 14, NO. 1, MARCH 2014 New York: IEEE, 2014. e-journal.