Gaya APA

D’Alessio, M. et al (2014). Design of a Nanometric CMOS Memory Cell for Hardening to a Single Event With a Multiple-Node Upset (VOL. 14, NO. 1, MARCH 2014). New York: IEEE.

Gaya MLA

D’Alessio, Marco. et al. "Design of a Nanometric CMOS Memory Cell for Hardening to a Single Event With a Multiple-Node Upset". VOL. 14, NO. 1, MARCH 2014 New York: IEEE, 2014. e-journal.