e-journal

Scratching of Patterned Cu/Dielectric Surface Layers by Pad Asperities in CMP

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Abstract—In chemical-mechanical polishing (CMP), as the rough polymer pad slides over patterned structures of metal interconnects and dielectrics the pad asperities themselves, though soft, may scratch the relatively hard layers. The fully plastically deformed pad asperities with high interfacial friction are the primary sources of pad scratching. In this paper, scratching of Cu/dielectric line structures by pad asperities is investigated. First, the scratching criteria and the scratch-regime
maps, constructed previously for monolithic layers based on contact mechanics are extended for the patterned layers. Then sliding experiments have been conducted on patterned Cu/dielectric surface
layers of various linewidths using solid polymeric pins loaded into the fully plastically deformed state, as well as commercial CMP pads. Specifically, the role of the width of Cu and dielectric
lines in comparison with the contact diameter is examined. The theoretical models predict that the scratch criteria for patterns with wide lines are the same as those for monolithic layers, whereas patterns with extremely narrow lines behave as composite layers with effective mechanical properties. Experimental results validate the scratch criteria based on contact mechanics.

Index Terms—Semiconductor, defect, CMP.

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Informasi Detail

Judul Seri

IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, VOL. 28, NO. 1, FEBRUARY 2015

No. Panggil

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Penerbit

: IEEE., 2015

Deskripsi Fisik

IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, VOL. 28, NO. 1, FEBRUARY 2015

Bahasa

English

ISBN/ISSN

0894-6507

Klasifikasi

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Tipe Isi

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Tipe Media

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Tipe Pembawa

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Edisi

VOL. 28, NO. 1, FEBRUARY 2015

Subjek

SEMIKONDUKTOR

Info Detail Spesifik

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Pernyataan Tanggungjawab

ETY

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