e-journal

Comparison of Reaction-Diffusion and Atomistic Trap-Based BTI Models for Logic Gates

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In deeply scaled CMOS technology, time-dependent degradation mechanisms (TDDMs), such as Bias Temperature Instability (BTI), have threatened the transistor performance, hence the overall circuit/system reliability. Two well-known attempts to model BTI mechanism are the reaction-diffusion (R-D) model and
the Atomistic trap-based model. This paper presents a thorough comparative analysis of the two models at the gate-level in order to explore when their predictions are the same and when not. The comparison is done by evaluating degradation trends in a set of CMOS logic gates (e.g., INV, NAND, NOR, etc.) while
considering seven attributes: 1) gate type, 2) gate drive strength, 3) input frequency, 4) duty factor, 5) non-periodicity, 6) instant degradation versus long-term aging, and 7) simulation CPU time and memory usage. The simulation results show that two models are in consistency in terms of the gate degradation trends w.r.t. the first four attributes (gate type, input frequency, etc.). For the rest of the attributes, the workload-dependent solution of the Atomistic trap-based model is superior from the point of non-periodicity and instant degradation, while the R-D model gets advantageous in case of long-term aging, and simulation CPU time and memory usage due to its lite AC periodic and duty factor dependent
solution.
Index Terms—Atomistic trap-based model, BTI, degradation,reaction-diffusion model, reliability.

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Ketersediaan

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Informasi Detail

Judul Seri

IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY

No. Panggil

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Penerbit

New York : IEEE., 2014

Deskripsi Fisik

IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, VOL. 14, NO. 1, MARCH 2014

Bahasa

English

ISBN/ISSN

1530-4388

Klasifikasi

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Tipe Isi

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Tipe Media

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Tipe Pembawa

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Edisi

VOL. 14, NO. 1, MARCH 2014

Subjek

TEKNIK

Info Detail Spesifik

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Pernyataan Tanggungjawab

yuli/agus

Versi lain/terkait

Lampiran Berkas

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