e-journal
Impact of FinFET and III–V/Ge Technology on Logic and Memory Cell Behavior
In this paper, we assess the performance of a ring oscillator and a DRAM cell when they are implemented with different technologies (planar CMOS, FinFETs, and III–V MOSFETs), and subjected to different reliability scenarios (variability and soft errors). FinFET-based circuits show the highest robustness against variability and soft error environments.
Index Terms—DRAM, integrated circuit reliability, ring oscillators, III–V semiconductor materials.
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