An FPGA-based In-line Accelerator for Memcached | Elibrary Perpustakaan Universitas Riau

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An FPGA-based In-line Accelerator for Memcached

Maysam Lavasani - Nama Orang; Hari Angepat - Nama Orang; Derek Chiou - Nama Orang;

We present a method for accelerating server applications using a hybrid CPU+FPGA architecture and demonstrate its advantages by accelerating Memcached, a distributed key-value system. The accelerator, implemented on the FPGA fabric, processes request packets directly from the network, avoiding the CPU in most cases. The accelerator is created by profiling the application to determine the most commonly executed trace of basic blocks which are then extracted. Traces are executed speculatively within the FPGA. If the control flow exits the trace prematurely, the side effects of the computation are rolled back and the request packet is passed to the CPU. When compared to the best reported software numbers, the Memcached accelerator is 9.15x more energy efficient for common case requests.

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Judul Seri: COMPUTER ARCHITECTURE
No. Panggil: -
Penerbit: Sweden : IEEE Computer Architecture Letters., 2014
Deskripsi Fisik: IEEE COMPUTER ARCHITECTURE LETTERS, VOL. 13, NO. 2, JULY-DECEMBER 2014
Bahasa: English
ISBN/ISSN: Digital Object Ident
Klasifikasi: -
Tipe Isi: -
Tipe Media: -
Tipe Pembawa: -
Edisi: VOL. 13, NO. 2, JULY-DECEMBER 2014
Subjek: ARSITEKTUR KOMPUTER
Info Detail Spesifik: -
Pernyataan Tanggungjawab: deliza

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FULLTEXT: An FPGA-based In-line Accelerator for Memcached

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