Gaya APA

al.], D, K, [. (2015). Architectural Support for Mitigating Row Hammering in DRAM Memories (VOL. 14, NO. 1, JANUARY-JUNE 2015). Sweden: IEEE Computer Architecture Letters.

Gaya MLA

al.], Dae-Hyun, Kim, [et. "Architectural Support for Mitigating Row Hammering in DRAM Memories". VOL. 14, NO. 1, JANUARY-JUNE 2015 Sweden: IEEE Computer Architecture Letters, 2015. e-journal.