Ditapis dengan
Effect of higher spatial harmonics on properties of six-phase induction machi…
The paper deals with analysis of the situation in a six-phase induction machine. For this purpose, the method of space vectors is used. It is shown that higher space harmonic waves of current layer, flux density and flux in the stator yoke have to be considered especially when the stator is fed by unbalanced voltages. The equations of a six-phase induction machine are derived and relation betwe…
- Edisi
- (2015) 97:155–164
- ISBN/ISSN
- DOI 10.1007/s00202-0
- Deskripsi Fisik
- Electr Eng (2015) 97:155–164
- Judul Seri
- -
- No. Panggil
- -
Detection of rotor fault in three-phase induction motor in case of low-freque…
This paper proposes a method for the separation of broken rotor bar failure and low-frequency load fluctuation in line-fed three-phase induction motor. In practice, the presence of load fluctuation at 2s fs has the same effect on a stator current of induction motor as a broken rotor bar fault. In such cases, the detection of broken rotor bar failure becomes difficult. To discern rotor fault and…
- Edisi
- (2015) 97:337–345
- ISBN/ISSN
- DOI 10.1007/s00202-0
- Deskripsi Fisik
- Electr Eng (2015) 97:337–345
- Judul Seri
- ELECTRICAL ENGINEERING
- No. Panggil
- -
Spatial and Temporal Variability of Rainfall in Anand District of Gujarat State
Rainfall Variability is one of the key factors that affect agricultural production in any region. Hence the proper understanding of rainfall pattern and its trends may help water resources development and to take decisions for the developmental activities of that place. The present study is an attempt to evaluate the spatial and temporal rainfall variability of Anand district of Gujarat Stat…
- Edisi
- -
- ISBN/ISSN
- doi: 10.1016/j.aqpro
- Deskripsi Fisik
- Aquatic Procedia 4 ( 2015 ) 713 – 720
- Judul Seri
- Aquatic Procedia 4 ( 2015 ) 713 – 720
- No. Panggil
- -
Current-tunable current-mode RMS detector
A new realization of root mean square (RMS) detector comprising two controlled current conveyors, metaloxide-semiconductor transistors and a single grounded capacitor is presented in this paper, without any external resistors and components matching requirements added. The proposed circuit can be used for measuring the RMS value of periodic, band-limited signals. Inherently, the circuit is well…
- Edisi
- (2015) 97:65–74
- ISBN/ISSN
- DOI 10.1007/s00202-0
- Deskripsi Fisik
- Electr Eng (2015) 97:65–74
- Judul Seri
- ELECTRICAL ENGINEERING
- No. Panggil
- -
Comparative analysis of swarm optimization-based control method for direct ma…
Direct matrix converter (DMC) is an AC–AC converter which supplies power flowbetweenAC power supply and the load for changing voltage and current requirements. Its relatively small power circuits and simple control structures provide considerable advantages to itself with respect to the classical AC–AC converter topologies. In this article, the new control method based on swarm optimization…
- Edisi
- (2015) 97:181–193
- ISBN/ISSN
- DOI 10.1007/s00202-0
- Deskripsi Fisik
- Electr Eng (2015) 97:181–193
- Judul Seri
- ELECTRICAL ENGINEERING
- No. Panggil
- -
Backtracking search algorithm-based optimal power flow with valve point effec…
This paper presents a solution technique for optimal power flow (OPF) with valve-point effect and prohibited operating zones of power systems using backtracking search algorithm (BSA). BSA is a new population-based evolutionary algorithm. The most important property of the algorithm is not over precision to initial of value, unlike many other heuristic algorithms. The proposed algorithm having …
- Edisi
- (2015) 97:101–110
- ISBN/ISSN
- DOI 10.1007/s00202-0
- Deskripsi Fisik
- Electr Eng (2015) 97:101–110
- Judul Seri
- ELECTRICAL ENGINEERING
- No. Panggil
- -
A single-point method for identification sources of harmonic pollution applic…
Detecting harmonic source at power grid become one of the most important task for the utility. Therefore, in this paper we propose a new and efficient method for quantifying and detecting distortion sources caused on customer’s side. It is based on measuring distortion power by using modified power meter. The distortion power is a component of apparent power that exists only at nonlinear load…
- Edisi
- (2015) 97:165–174
- ISBN/ISSN
- DOI 10.1007/s00202-0
- Deskripsi Fisik
- Electr Eng (2015) 97:165–174
- Judul Seri
- ELECTRICAL ENGINEERING
- No. Panggil
- -
A novel concept for derating of transformer under unbalance voltage in the p…
Unbalanced supply voltage and non-linear loads have become significant consideration in the designing transformers. this condition results in devastating effects such as high loss, early damage of insulation and premature failure of the transformers. For proper operation of transformers, capacity of transformer should be reduced. This paper presents a novel concept for mixed derating of distr…
- Edisi
- (2015) 97:45–56
- ISBN/ISSN
- DOI 10.1007/s00202-0
- Deskripsi Fisik
- Electr Eng (2015) 97:45–56
- Judul Seri
- Electrical Engineering
- No. Panggil
- -
A neural network based approach to estimate of power system harmonics for an …
This study presents an artificial neural network based intelligent monitoring algorithm to detect of a power system harmonics. The proposed approach was tested on the current and voltage data of an induction furnace power system, which was collected by using a LabVIEW based measurement system under different load conditions. The collected data was analyzed with MATLAB program using the short-ti…
- Edisi
- (2015) 97:111–117
- ISBN/ISSN
- DOI 10.1007/s00202-0
- Deskripsi Fisik
- Electr Eng (2015) 97:111–117
- Judul Seri
- -
- No. Panggil
- -
Simulation of Saltwater Intrusion in a Coastal Aquifer in Karnataka,India
A grid based variable density numerical model, SEAWAT-2000 is used to conceptually simulate groundwater flow and transport for a coastal stretch in Karnataka state, India. SEAWAT is a coupled version of MODFLOW and MT3DMS designed to simulate three-dimensional, variable density groundwater flow and multi-species transport. The variable density flow process uses the familiar and well established…
- Edisi
- -
- ISBN/ISSN
- doi: 10.1016/j.aqpro
- Deskripsi Fisik
- Aquatic Procedia 4 ( 2015 ) 700 – 705
- Judul Seri
- Aquatic Procedia
- No. Panggil
- -
Assessing Suitability of GP Modeling for Groundwater Level
Artificial Neural Network and other soft computing techniques have been widely used for modeling groundwater level changes. Emphasis has been laid by different researches in improving the quality of input data which significantly affects the final model. In this study Genetic Programming (GP) is used to model spatial variation of groundwater in Arjuna Nadhi sub basin region. For a limited list …
- Edisi
- -
- ISBN/ISSN
- doi: 10.1016/j.aqpro
- Deskripsi Fisik
- Aquatic Procedia 4 ( 2015 ) 693 – 699
- Judul Seri
- Aquatic Procedia
- No. Panggil
- -
Assessment of Groundwater Quality for Drinking Purpose in Rural Areas Surroun…
The suitability of groundwater quality of 22 wells located in the rural areas surrounding Ingaldhal defunct copper mine in Chithradurga district of Karnataka state was assessed for drinking purpose based on the various water quality parameters. Standard methods for physicochemical analysis of groundwater samples were employed. The results of analysis carried out showed the following concentrati…
- Edisi
- -
- ISBN/ISSN
- doi: 10.1016/j.aqpro
- Deskripsi Fisik
- Aquatic Procedia 4 ( 2015 ) 685 – 692
- Judul Seri
- Aquatic Procedia
- No. Panggil
- -
Modified SCS-CN and Green-Ampt Methods in Surface Runoff Modelling for the Ku…
Kundapallam watershed is located in Nilgiris District of south India. This ungauged watershed has an areal extension of 14.37 km². There are increasing numbers of rainfall induced landslide occurrences in this area. The causes of rainfall induced landslides require a thorough understanding of runoff characteristics of the watershed. In this respect, the runoff of the study area is estimated wi…
- Edisi
- -
- ISBN/ISSN
- doi: 10.1016/j.aqpro
- Deskripsi Fisik
- Aquatic Procedia 4 ( 2015 ) 677 – 684
- Judul Seri
- Aquatic Procedia
- No. Panggil
- -
New Indicator Based Method SALDIT for Delineation of Natural Groundwater Rech…
A structured approach based on indicators evaluation technique has been developed as a technical tool to help demarcating the potential groundwater recharge areas. The tool is a generic and can be applied universally. Based on a combination of field experience and expert opinion six measurable indicator parameters viz.,Slope of the ground, Aquifer specific yield, Land and soil cover, Depth to g…
- Edisi
- -
- ISBN/ISSN
- doi: 10.1016/j.aqpro
- Deskripsi Fisik
- Aquatic Procedia 4 ( 2015 ) 649 – 659
- Judul Seri
- Aquatic Procedia
- No. Panggil
- -
Nethravathi River - Water Supply Scheme in Dakshina Kannada District - A Case…
Water is essential for all living beings. It is a major concern to provide water to all. It is a challenge to supply water to all major cities in Dakshina Kannada district, Karnataka, India. Nethravathi River is one of the major sources of water in the region which yields about 1240TMC per year. Nethravathi River has its origins in Western Ghats of Karnataka flowing to a length of 126 Km and jo…
- Edisi
- -
- ISBN/ISSN
- doi: 10.1016/j.aqpro
- Deskripsi Fisik
- Aquatic Procedia 4 ( 2015 ) 625 – 632
- Judul Seri
- Aquatic Procedia
- No. Panggil
- -
A Case for a Value-Aware Cache
Replication of values causes poor utilization of on-chip cache memory resources. This paper addresses the question: How much cache resources can be theoretically and practically saved if value replication is eliminated? We introduce the concept of valueaware caches and show that a sixteen times smaller value-aware cache can yield the same miss rate as a conventional cache. We then make a case f…
- Edisi
- VOL. 13, NO. 1, JANUARY- 2014
- ISBN/ISSN
- Digital Object Ident
- Deskripsi Fisik
- IEEE COMPUTER ARCHITECTURE LETTERS, VOL. 13, NO. 1, JANUARY- 2014
- Judul Seri
- COMPUTER ARCHITECTURE
- No. Panggil
- -
A Coarse-Grained Reconfigurable Architecture for Compute-Intensive MapReduce …
Large-scale workloads often show parallelism of different levels. which offers acceleration potential for clusters and parallel processors. Although processors such as GPGPUs and FPGAs show good performance of speedup, there is still vacancy for a low power, high efficiency and dynamically reconfigurable one, and coarse-grained reconfigurable architecture(CGRA) seems to be one possible choice. …
- Edisi
- -
- ISBN/ISSN
- DOI 10.1109/LCA.2015
- Deskripsi Fisik
- -
- Judul Seri
- -
- No. Panggil
- -
A Cross-Layer Multicore Architecture to Tradeoff Program Accuracy and Resilie…
To protect multicores from soft-error perturbations, resiliency schemes have been developed with high coverage but high power/performance overheads (2). We observe that not all soft-errors affect program correctness, some soft-errors only affect program accuracy, i.e., the program completes with certain acceptable deviations from soft-error free outcome. Thus, it is practical to improve proce…
- Edisi
- VOL. 14, NO. 2, JULY-DECEMBER 2015
- ISBN/ISSN
- Digital Object Ident
- Deskripsi Fisik
- IEEE COMPUTER ARCHITECTURE LETTERS, VOL. 14, NO. 2, JULY-DECEMBER 2015
- Judul Seri
- COMPUTER ARCHITECTURE
- No. Panggil
- -
A Graph-Based Program Representation for Analyzing Hardware Specialization Ap…
Abstract—Hardware specialization has emerged as a promising paradigm for future microprocessors. Unfortunately, it is natural to develop and evaluate such architectures within end-to-end vertical silos spanning application, language/ compiler, hardware design and evaluation tools, leaving little opportunity for cross-architecture analysis and innovation. This paper develops a novel program re…
- Edisi
- VOL. 14, NO. 2, JULY-DECEMBER 2015
- ISBN/ISSN
- Digital Object Ident
- Deskripsi Fisik
- IEEE COMPUTER ARCHITECTURE LETTERS, VOL. 14, NO. 2, JULY-DECEMBER 2015
- Judul Seri
- COMPUTER ARCHITECTURE
- No. Panggil
- -
A Hardware-Software Cooperative Approach for Application Energy Profiling
Abstract—Energy consumption by software applications is a critical issue that determines the future of multicore software development. In this article, we propose a hardware-software Cooperative approach that uses hardware support to efficiently gather the energy-related hardware counters during program execution, and utilizes parameter estimation models in software to compute the energy cons…
- Edisi
- VOL. 14, NO. 1, JANUARY-JUNE 2015
- ISBN/ISSN
- Digital Object Ident
- Deskripsi Fisik
- IEEE COMPUTER ARCHITECTURE LETTERS, VOL. 14, NO. 1, JANUARY-JUNE 2015
- Judul Seri
- COMPUTER ARCHITECTURE
- No. Panggil
- -
A Methodology for Cognitive NoC Design
The number of cores in a multicore chip design has been increasing in the past two decades. The rate of increase will continue for the foreseeable future. With a large number of cores, the on-chip communication has become a very important design consideration. The increasing number of cores will push the communication complexity level to a point where managing such highly complex systems requir…
- Edisi
- -
- ISBN/ISSN
- DOI 10.1109/LCA.2015
- Deskripsi Fisik
- IEEE Computer Architecture Letters
- Judul Seri
- Computer Architecture
- No. Panggil
- -
A Power Efficient and Compact Optical Interconnect for Network-on-Chip
Optical interconnect is a promising alternative to substitute the electrical interconnect for intra-chip communications. The topology of optical Network-on-Chip (ONoC) has a great impact on the network performance. However, the size of ONoC is limited by the power consumption and crosstalk noise, which are mainly resulted from the waveguide crossings in the topology. In this paper, a diagonal M…
- Edisi
- VOL. 13, NO. 1, JANUARY- 2014
- ISBN/ISSN
- Digital Object Ident
- Deskripsi Fisik
- EEE COMPUTER ARCHITECTURE LETTERS, VOL. 13, NO. 1, JANUARY- 2014
- Judul Seri
- ARCHITECTURE LETTERS
- No. Panggil
- -
A Quantitative Method To Data Reuse Patterns of SIMT Applications
Understanding data reuse patterns of a computing system is crucial to effective design optimization. The emerging SIMT (Single Instruction Multiple Threads) processor adopts a programming model that is fundamentally disparate from conventional scalar processors. There is a lack of analytical approaches to quantify the data reuse of SIMT applications. This paper presents a quantitative method t…
- Edisi
- -
- ISBN/ISSN
- DOI 10.1109/LCA.2015
- Deskripsi Fisik
- -
- Judul Seri
- Computer Architecture
- No. Panggil
- -
A Sufficient Condition for Deadlock-Free Adaptive Routing in Mesh Networks
Deadlock remains a central problem in interconnection network. In this paper, we establish a new theory of deadlock-free flow control for k-ary, n-cube mesh network, which enables the use of any minimal-path adaptive routing algorithms while avoiding deadlock. We prove that the proposed flow control algorithm is a sufficient condition for deadlock freedom in any minimal path, adaptive routing a…
- Edisi
- VOL. 14, NO. 2, JULY-DECEMBER 2015
- ISBN/ISSN
- Digital Object Ident
- Deskripsi Fisik
- IEEE COMPUTER ARCHITECTURE LETTERS, VOL. 14, NO. 2, JULY-DECEMBER 2015
- Judul Seri
- COMPUTER ARCHITECTURE
- No. Panggil
- -
Adaptive Cache and Concurrency Allocation on GPGPUs
Abstract—Memory bandwidth is critical to GPGPU performance. Exploiting locality in caches can better utilize memory bandwidth. However, memory requests issued by excessive threads cause cache thrashing and saturate memory bandwidth, degrading performance. In this paper, we propose adaptive cache and concurrency allocation (CCA) to prevent cache thrashing and improve the utilization of bandwid…
- Edisi
- VOL. 14, NO. 2, JULY-DECEMBER 2015
- ISBN/ISSN
- Digital Object Ident
- Deskripsi Fisik
- IEEE COMPUTER ARCHITECTURE LETTERS, VOL. 14, NO. 2, JULY-DECEMBER 2015
- Judul Seri
- COMPUTER ARCHITECTURE
- No. Panggil
- -
Adaptive Wear-Leveling in Flash-Based Memory
The paper presents an adaptive wear-leveling scheme based on several wear-thresholds in different periods. The basic idea behind this scheme is that blocks can have different wear-out speeds and the wear-leveling mechanism does not conduct data migration until the erasure counts of some hot blocks hit a threshold. Through a series of emulation experiments based on several realistic disk traces,…
- Edisi
- VOL. 14, NO. 1, JANUARY-JUNE 2015
- ISBN/ISSN
- Digital Object Ident
- Deskripsi Fisik
- IEEE COMPUTER ARCHITECTURE LETTERS, VOL. 14, NO. 1, JANUARY-JUNE 2015
- Judul Seri
- COMPUTER ARCHITECTURE
- No. Panggil
- -
An Energy and Performance Efficient DVFS Scheme for Irregular Parallel Divide…
The divide-and-conquer paradigm can be used to express many computationally significant problems, but an important subset of these applications is inherently load-imbalanced. Load balancing is a challenge for irregular parallel divideand- conquer algorithms and efficiently solving these applications will be a key requirement for future many-core systems. To address the load imbalance issue, ins…
- Edisi
- VOL. 13, NO. 1, JANUARY-JUNE 2014
- ISBN/ISSN
- Digital Object Ident
- Deskripsi Fisik
- IEEE COMPUTER ARCHITECTURE LETTERS, VOL. 13, NO. 1, JANUARY-JUNE 2014
- Judul Seri
- COMPUTER ARCHITECTURE
- No. Panggil
- -
Architecting Flash-based Solid-State Drive for High-performance I/O Virtualiz…
Flash-based solid-state drive (SSD) is now being widely deployed in cloud computing platforms due to the potential advantages of better performance and less energy consumption. However, current virtualization architecture lacks support for highperformance I/O virtualization over persistent storage, which results in sub-optimal I/O performance for guest virtual machines (VMs) on SSD. Further, cu…
- Edisi
- VOL. 13, NO. 2, JULY-DECEMBER 2014
- ISBN/ISSN
- Digital Object Ident
- Deskripsi Fisik
- IEEE COMPUTER ARCHITECTURE LETTERS, VOL. 13, NO. 2, JULY-DECEMBER 2014
- Judul Seri
- COMPUTER ARCHITECTURE
- No. Panggil
- -
Architectural Reliability: Lifetime Reliability Characterization and Manageme…
This paper presents a lifetime reliability characterization of many-core processors based on a full-system simulation of integrated microarchitecture, power, thermal, and reliability models. Under normal operating conditions, our model and analysis reveal that the mean-time-to-failure of cores on the die show normal distribution. From the processor-level perspective, the key insight is that red…
- Edisi
- VOL. 14, NO. 2, JULY-DECEMBER 2015
- ISBN/ISSN
- Digital Object Ident
- Deskripsi Fisik
- IEEE COMPUTER ARCHITECTURE LETTERS, VOL. 14, NO. 2, JULY-DECEMBER 2015
- Judul Seri
- COMPUTER ARCHITECTURE
- No. Panggil
- -
Architectural Thermal Energy Harvesting Opportunities for Sustainable Computing
Increased power dissipation in computing devices has led to a sharp rise in thermal hotspots, creating thermal runaway. To reduce the additional power requirement caused by increased temperature, current approaches apply cooling mechanisms to remove heat or apply management techniques to avoid thermal emergencies by slowing down heat generation. This paper proposes to tackle the heat management…
- Edisi
- VOL. 13, NO. 2, JULY-DECEMBER 2014
- ISBN/ISSN
- Digital Object Ident
- Deskripsi Fisik
- IEEE COMPUTER ARCHITECTURE LETTERS, VOL. 13, NO. 2, JULY-DECEMBER 2014
- Judul Seri
- COMPUTER ARCHITECTURE
- No. Panggil
- -
Argus-G: Comprehensive, Low-Cost Error Detection for GPGPU Cores
We have developed and evaluated Argus-G, an error detection scheme for general purpose GPU (GPGPU) cores. Argus-G is a natural extension of the Argus error detection scheme for CPU cores, and we demonstrate how to modify Argus such that it is compatible with GPGPU cores. Using an RTL prototype, we experimentally show that Argus-G can detect the vast majority of injected errors at relatively lo…
- Edisi
- OL. 14, NO. 1, JANUARY-JUNE 2015
- ISBN/ISSN
- Digital Object Ident
- Deskripsi Fisik
- IEEE COMPUTER ARCHITECTURE LETTERS, VOL. 14, NO. 1, JANUARY-JUNE 2015
- Judul Seri
- COMPUTER ARCHITECTURE
- No. Panggil
- -
AYUSH: A Technique for Extending Lifetime of SRAM-NVM Hybrid Caches
Recently, researchers have explored way-based hybrid SRAM-NVM (non-volatile memory) last level caches (LLCs) to bring the best of SRAM and NVM together. However, the limited write endurance of NVMs restricts the lifetime of these hybrid caches. We present AYUSH, a technique to enhance the lifetime of hybrid caches, which works by using data-migration to preferentially use SRAM for storing freq…
- Edisi
- , VOL. 14, NO. 2, JULY-DECEMBER 2015
- ISBN/ISSN
- Digital Object Ident
- Deskripsi Fisik
- IEEE COMPUTER ARCHITECTURE LETTERS, VOL. 14, NO. 2, JULY-DECEMBER 2015
- Judul Seri
- COMPUTER ARCHITECTURE
- No. Panggil
- -
Block Unification IF-conversion for High Performance Architectures
Graphics Processing Units accelerate data-parallel graphic calculations using wide SIMD vector units. Compiling programs to use the GPU’s SIMD architectures require converting multiple control flow paths into a single stream of instructions. IF-conversion is a compiler transformation, which converts control dependencies into data dependencies, and it is used by vectorizing compilers to elimi…
- Edisi
- VOL. 13, NO. 1, JANUARY-JUNE 2014
- ISBN/ISSN
- Digital Object Ident
- Deskripsi Fisik
- IEEE COMPUTER ARCHITECTURE LETTERS, VOL. 13, NO. 1, JANUARY-JUNE 2014
- Judul Seri
- COMPUTER ARCHITECTURE
- No. Panggil
- -
Cache Calculus: Modeling Caches through Differential Equations
Caches are critical to performance, yet their behavior is hard to understand and model. In particular, prior work does not provide closed-form solutions of cache performance, i.e. simple expressions for the miss rate of a specific access pattern. Existing cache models instead use numerical methods that, unlike closed-form solutions, are computationally expensive and yield limited insight. We pr…
- Edisi
- -
- ISBN/ISSN
- DOI 10.1109/LCA.2015
- Deskripsi Fisik
- DOI 10.1109/LCA.2015.2512873, IEEE Computer Architecture Letters
- Judul Seri
- Computer Architecture
- No. Panggil
- -
CIDR: A Cache Inspired Area-Efficient DRAM Resilience Architecture against Pe…
Faulty cells have become major problems in cost-sensitive main-memory DRAM devices. Conventional solutions to reduce device failure rates due to cells with permanent faults, such as populating spare rows and relying on errorcorrecting codes, have had limited success due to high area overheads. In this paper, we propose CIDR, a novel cache-inspired DRAM resilience architecture, which substantia…
- Edisi
- VOL. 14, NO. 1, JANUARY-JUNE 2015
- ISBN/ISSN
- Digital Object Ident
- Deskripsi Fisik
- IEEE COMPUTER ARCHITECTURE LETTERS, VOL. 14, NO. 1, JANUARY-JUNE 2015
- Judul Seri
- COMPUTER ARCHITECTURE
- No. Panggil
- -
Coding Last Level STT-RAM Cache For High Endurance And Low Power
STT-RAM technology has recently emerged as one of the most promising memory technologies. However, its major problems, limited write endurance and high write energy, are still preventing it from being used as a drop-in replacement of SRAM cache. In this paper, we propose a novel coding scheme for STT-RAM last level cache based on the concept of value locality. We reduce switching probability in…
- Edisi
- VOL. 13, NO. 2, JULY-DECEMBER 2014
- ISBN/ISSN
- Digital Object Ident
- Deskripsi Fisik
- IEEE COMPUTER ARCHITECTURE LETTERS, VOL. 13, NO. 2, JULY-DECEMBER 2014
- Judul Seri
- COMPUTER ARCHITECTURE
- No. Panggil
- -
Diversity: A Design Goal for Heterogeneous Processors
A growing number of processors have CPU cores that implement the same instruction set architecture (ISA) using different microarchitectures. The underlying motivation for single-ISA heterogeneity is that a diverse set of cores can enable runtime flexibility. Modern processors are subject to strict power budgets, and heterogeneity provides the runtime scheduler with more latitude to decide the l…
- Edisi
- -
- ISBN/ISSN
- DOI 10.1109/LCA.2015
- Deskripsi Fisik
- IEEE Computer Architecture Letters
- Judul Seri
- Computer Architecture
- No. Panggil
- -
DRACO: A Deduplicating FTL for Tangible Extra Capacity
The rapid random access of SSDs enables efficient searching of redundant data and their deduplication. However, the space earned from deduplication cannot be used as permanent storage because it must be reclaimed when deduplication is cancelled as a result of an update to the deduplicated data. To overcome this limitation, we propose a novel FTL scheme that enables the gained capacity to be us…
- Edisi
- VOL. 14, NO. 2, JULY-DECEMBER 2015
- ISBN/ISSN
- Digital Object Ident
- Deskripsi Fisik
- IEEE COMPUTER ARCHITECTURE LETTERS, VOL. 14, NO. 2, JULY-DECEMBER 2015
- Judul Seri
- COMPUTER ARCHITECTURE
- No. Panggil
- -
DRAMA: An Architecture for Accelerated Processing Near Memory
Improving energy efficiency is crucial for both mobile and high-performance computing systems while a large fraction of total energy is consumed to transfer data between storage and processing units. Thus, reducing data transfers across the memory hierarchy of a processor (i.e., off-chip memory, on-chip caches, and register file) can greatly improve the energy efficiency. To this end, we propos…
- Edisi
- VOL. 14, NO. 1, JANUARY-JUNE 2015
- ISBN/ISSN
- Digital Object Ident
- Deskripsi Fisik
- IEEE COMPUTER ARCHITECTURE LETTERS, VOL. 14, NO. 1, JANUARY-JUNE 2015
- Judul Seri
- COMPUTER ARCHITECTURE
- No. Panggil
- -
DRAMSim2: A Cycle Accurate Memory System Simulator
In this paper we present DRAMSim2, a cycle accurate memory system simulator. The goal of DRAMSim2 is to be an accurate and publicly available DDR2/3 memory system model which can be used in both full system and trace-based simulations. We describe the process of validating DRAMSim2 timing against manufacturer Verilog models in an effort to prove the accuracy of simulation results. We outline t…
- Edisi
- VOL. 10, NO. 1, JANUARY-JUNE 2011
- ISBN/ISSN
- DOI 10.1109/L-CA.201
- Deskripsi Fisik
- IEEE COMPUTER ARCHITECTURE LETTERS, VOL. 10, NO. 1, JANUARY-JUNE 2011
- Judul Seri
- COMPUTER ARCHITECTURE
- No. Panggil
- -
Dynamic Resource Sharing for High-Performance 3-D Networks-on-Chip
3D logic-on-logic technology is a promising approach for extending the validity of Moore’s law when technology scaling stops. 3D technology can also lead to a paradigm shift in on-chip communication design by providing orders of magnitude higher bandwidth and lower latency for inter-layer communication. To turn the 3D technology bandwidth and latency benefits into network latency reductions …
- Edisi
- -
- ISBN/ISSN
- DOI 10.1109/LCA.2015
- Deskripsi Fisik
- IEEE Computer Architecture Letters
- Judul Seri
- Computer Architecture
- No. Panggil
- -
Efficient Execution of Bursty Applications
The performance of user-facing applications is critical to client platforms. Many of these applications are event-driven and exhibit ”bursty” behavior: the application is generally idle but generates bursts of activity in response to human interaction. We study one example of a bursty application, web-browsers, and produce two important insights: (1) Activity bursts contain false parallelis…
- Edisi
- -
- ISBN/ISSN
- DOI 10.1109/LCA.2015
- Deskripsi Fisik
- IEEE Computer Architecture Letters
- Judul Seri
- Computer Architecture
- No. Panggil
- -
End-Point Congestion Filter for Adaptive Routing with Congestion-Insensitive …
Interconnection networks are a critical component in most modern systems nowadays. Both off-chip networks, in HPC systems, data centers, and cloud servers, and on-chip networks, in chip multiprocessors (CMPs) and multiprocessors system-on-chip (MPSoCs), play an increasing role as their performance is vital for the performance of the whole system. One of the key components of any interconnect i…
- Edisi
- -
- ISBN/ISSN
- DOI 10.1109/LCA.2015
- Deskripsi Fisik
- IEEE Computer Architecture Letters
- Judul Seri
- Computer Architecture
- No. Panggil
- -
Energy Aware Persistence: Reducing the Energy Overheads of Persistent Memory
Next generation byte addressable nonvolatile memory (NVM) technologies like PCM are attractive for end-user devices as they offer memory scalability as well as fast persistent storage. In such environments, NVM’s limitations of slow writes and high write energy are magnified for applications that need atomic, consistent, isolated and durable (ACID) updates. This is because, for satisfying cor…
- Edisi
- -
- ISBN/ISSN
- DOI 10.1109/LCA.2015
- Deskripsi Fisik
- IEEE Computer Architecture Letters
- Judul Seri
- Computer Architecture
- No. Panggil
- -
Enhancing the L1 Data Cache Design to Mitigate HCI
Over the lifetime of a microprocessor, the Hot Carrier Injection (HCI) phenomenon degrades the threshold voltage, which causes slower transistor switching and eventually results in timing violations and faulty operation. This effect appears when the memory cell contents flip from logic ‘0’ to ‘1’ and vice versa. In caches, the majority of cell flips are concentrated into only a few of t…
- Edisi
- -
- ISBN/ISSN
- DOI 10.1109/LCA.2015
- Deskripsi Fisik
- IEEE COMPUTER ARCHITECTURE LETTERS
- Judul Seri
- Computer Architecture
- No. Panggil
- -
Epoch Profiles: Microarchitecture-Based Application Analysis and Optimization
The performance of data-intensive applications, when running on modern multi- and many-core processors, is largely determined by their memory access behavior. Its most important contributors are the frequency and latency of off-chip accesses and the extent to which long-latency memory accesses can be overlapped with useful computation or with each other. In this paper we present two methods to…
- Edisi
- VOL. 14, NO. 1, JANUARY-JUNE 2015
- ISBN/ISSN
- Digital Object Ident
- Deskripsi Fisik
- IEEE COMPUTER ARCHITECTURE LETTERS, VOL. 14, NO. 1, JANUARY-JUNE 2015
- Judul Seri
- COMPUTER ARCHITECTURE
- No. Panggil
- -
Systems Approach for Optimal Operation of Water Resources Schemes in Kuttiadi…
An optimal operation plan has been developed for the reservoirs in Kuttiadi river basin in Kerala using systems approach. A system consists of three reservoirs namely; Banasurasagar in Wayanad district ,Kakkayam and Peruvannamuzhi in Kozhikode district has been taken for the study. Banasurasagar reservoir is in Kabbini river basin, which is an east flowing river and the remaining two are in …
- Edisi
- -
- ISBN/ISSN
- doi: 10.1016/j.aqpro
- Deskripsi Fisik
- Aquatic Procedia 4 ( 2015 ) 593 – 600
- Judul Seri
- Aquatic Procedia
- No. Panggil
- -
Expert Prefetch Prediction: An Expert Predicting the Usefulness of Hardware P…
Hardware prefetching improves system performance by hiding and tolerating the latencies of lower levels of cache and off-chip DRAM. An accurate prefetcher improves system performance whereas an inaccurate prefetcher can cause cache pollution and consume additional bandwidth. Prefetch address filtering techniques improve prefetch accuracy by predicting the usefulness of a prefetch address and ba…
- Edisi
- -
- ISBN/ISSN
- DOI 10.1109/LCA.2015
- Deskripsi Fisik
- IEEE Computer Architecture Letters
- Judul Seri
- Computer Architecture
- No. Panggil
- -
Identification of potential sites for detention ponds along the Vrishabhavath…
Vrishabhavathi Watershed is a constituent of the Arkavathi River Basin, Bangalore Urban and Ramanagara District and covers an area of 360.620Km2, representing seasonally dry tropical climate. In Vrishabhavathi watershed Vrishabhavathi River is the main surface water source which is tributary of river Arkavathy, which joins the Cauvery River at a later stage. Earlier this surface water was mainl…
- Edisi
- -
- ISBN/ISSN
- doi: 10.1016/j.aqpro
- Deskripsi Fisik
- Aquatic Procedia 4 ( 2015 ) 585 – 592
- Judul Seri
- Aquatic Procedia
- No. Panggil
- -
Exploiting Internal Parallelism of Flash-based SSDs
For the last few years, the major driving force behind the rapid performance improvement of SSDs has been the increment of parallel bus channels between a flash controller and flash memory packages inside the solid-state drives (SSDs). However, are other internal parallelisms inside SSDs yet to be explored. In order to improve performance further by utilizing the parallelism, this paper sugges…
- Edisi
- VOL. 9, NO. 1, JANUARY-JUNE 2010
- ISBN/ISSN
- DOI 10.1109/L-CA.201
- Deskripsi Fisik
- IEEE COMPUTER ARCHITECTURE LETTERS, VOL. 9, NO. 1, JANUARY-JUNE 2010
- Judul Seri
- COMPUTER ARCHITECTURE
- No. Panggil
- -
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