Ditapis dengan
ESD Implantations for On-Chip ESD Protection With Layout Consideration in 0.1…
Abstract One method to enhance electrostatic discharge (ESD) robustness of the on-chip ESD protection devices is through process design by adding an extra “ESD implantation” mask. In this work, ESD robustness of nMOS devices and diodes with different ESD implantation solutions in a 0.18- m salicided CMOS process is investigated by experimental testchips. The second breakdown current ( 2) o…
- Edisi
- VOL. 18, NO. 2, MAY 2005
- ISBN/ISSN
- 0894-6507
- Deskripsi Fisik
- IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, VOL. 18, NO. 2, MAY 2005
- Judul Seri
- IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, VOL. 18, NO. 2, MAY 2005
- No. Panggil
- -
A Temperature Sensor With an Inaccuracy of 1=+0.8 C Using 90-nm 1-V CMOS for …
Abstract This paper proposes an accurate four-transistor temperature sensor designed, and developed, for thermal testing and monitoring circuits in deep submicron technologies. A previous three-transistor temperature sensor, which utilizes the temperature characteristic of the threshold voltage, shows highly linear characteristics at a power supply voltage of 1.8 V or more; however, the supply…
- Edisi
- VOL. 21, NO. 2, MAY 2008
- ISBN/ISSN
- 0894-6507
- Deskripsi Fisik
- IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, VOL. 21, NO. 2, MAY 2008
- Judul Seri
- IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, VOL. 21, NO. 2, MAY 2008
- No. Panggil
- -
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