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Wafer Map Defect Detection and Recognition Using Joint Local and Nonlocal Linear Discriminant Analysis

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Abstract—In semiconductor manufacturing processes, defect detection and recognition in wafer maps have received increasing attention from semiconductor industry. The various defect patterns in wafer maps provide crucial information for assisting engineers in recognizing the root causes of the fabrication problems and solving them eventually. This paper develops a manifold learning-based wafer map defect detection and recognition system. In this system, a joint local and nonlocal linear discriminant
analysis (JLNDA) is proposed to discover intrinsic manifold information that provides the discriminant characteristics of the defect patterns. An unsupervised version of JLNDA (called local and nonlocal preserving projection) is further developed to provide a monitoring chart for defect detection of wafer maps. A JLNDA-based Fisher discriminant is further put forward for online defect recognition without the modeling procedure of recognizers. Comparisons with other regular methods, principal component analysis, local preserving projection, linear discriminant analysis (LDA) and local LDA, illustrate the superiority of JLNDA in wafer map defect recognition. The effectiveness of the proposed system has been verified by experimental results from a real-world data set of wafer maps (WM-811K).

Index Terms—Wafer map, defect detection and recognition, manifold learning, pattern recognition, feature extraction.

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Informasi Detail

Judul Seri

IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, VOL. 29, NO. 1, FEBRUARY 2016

No. Panggil

-

Penerbit

: IEEE., 2016

Deskripsi Fisik

IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, VOL. 29, NO. 1, FEBRUARY 2016

Bahasa

English

ISBN/ISSN

0894-6507

Klasifikasi

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Tipe Isi

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Tipe Media

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Tipe Pembawa

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Edisi

VOL. 29, NO. 1, FEBRUARY 2016

Subjek

SEMIKONDUKTOR

Info Detail Spesifik

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Pernyataan Tanggungjawab

ETY

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