This paper presents a concurrent error detection (CED) scheme for orthogonal Latin square (OLS) parallel decoders. Different from a CED scheme found in the technical literature that protects only the syndrome generator, the proposed CED scheme protects the whole OLS decoder for single stuck-at faults. This paper presents the detailed design and analysis of the proposed CED scheme and shows that…
Abstract—The carbon nanotube field-effect transistor (CNTFET) has been advocated as one of the possible alternatives to replace the MOSFET. Some of the likely defect types that may occur in its manufacturing process are the presence of undeposited CNTs and the change in CNT diameter. Existing simulation models are inadequate to assess the effect of undeposited CNTs, due to the limitation in …
Nanometric CMOS is likely to experience the occurrence of a single event causing a multiple-node upset. This paper presents a novel memory cell design as variant of the DICE cell (that is tolerant to only a single event with a single-node upset). The proposed design is referred to as TDICE and uses transistors to block the paths that connect a node to the next node in the feedback loop of the m…